A high-efficiency three-phase CMOS RF–DC rectifier for low-power IoT applications

Faculty Engineering Year: 2026
Type of Publication: ZU Hosted Pages: 17
Authors:
Journal: Computers and Electrical Engineering Elsevier Volume: Volume 131
Keywords : , high-efficiency three-phase CMOS RF–DC rectifier , low-power    
Abstract:
This paper presents a high-efficiency complementary metal–oxide–semiconductor (CMOS) radio-frequency energy harvesting rectifier based on a novel three-phase architecture for self-powered Internet of Things nodes and implantable biomedical devices. The proposed architecture routes the received radio-frequency signal into three equal-amplitude paths with phase shifts of 0°, 120°, and 240°. It enables time-interleaved parallel rectification thereby improving power conversion efficiency (PCE) and output voltage stability. Implemented in a 180 nm CMOS technology, the rectifier occupies a compact silicon area of and operates at 920 MHz. Simulation results demonstrate a peak PCE of 81% at an input power of dBm, a dynamic range of 21 dB, and a sensitivity of dBm, delivering a regulated 1 V output across a 100 k load. The effects of practical parasitic components, including bond wires, pads, and printed circuit board traces, are incorporated into the design of the input matching network, resulting in a reflection coefficient of approximately dB at the operating frequency. Furthermore, statistical Monte Carlo and process–voltage–temperature analyses are performed to assess post-fabrication robustness. Compared with conventional single-phase rectifiers, the proposed three-phase architecture achieves higher efficiency and lower output voltage ripple for low-power energy-harvesting applications.
   
     
 
       

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