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A Novel DAC Technique for Serial Interface Applications: Low-Power Low-Voltage Serial-to-Analog Conversion Using a CMOS Inverter
Faculty
Engineering
Year:
2025
Type of Publication:
ZU Hosted
Pages:
Authors:
Fathi Abdelfattah Farag Ahmed
Staff Zu Site
Abstract In Staff Site
Journal:
AEUE - International Journal of Electronics and Communications 2025 Elsevier
Volume:
Keywords :
, Novel , Technique , Serial Interface Applications: Low-Power
Abstract:
This paper presents a novel current-mode Digital-to-Analog Converter (DAC) method for serial interface applications. The proposed Serial-to-Analog Converter uses a cyclic approach to generate binary-weighted currents from a reference current. This approach is implemented with a programmable Current-Mode Sample-and-Hold (S/H) cell, based on a conventional CMOS inverter, ensuring low-power and low-voltage operation. The proposed cell can be integrated into data conversion systems (ADC and DAC), including time-interleaved DACs. The circuit is designed using only a CMOS inverter and a capacitor, making it suitable to be used as a DAC element in a Field Programmable Analog Array (FPAA). Additionally, the switches within the S/H cell operate at a constant DC voltage that makes the charge injection become charge independent and optimizing the design for low-voltage applications. The circuit is designed for fabrication in 130 nm CMOS technology, operating at a 1 V supply voltage with a power consumption of 192 μW. The proposed DAC has been simulated achieving 58 dB SNR and 40 dB SFDR with a 20 μA input current. The circuit demonstrates a DNL of 0.4 LSB and an INL of 0.8 LSB, making it suitable for high-frequency interleaved ADC applications.
Author Related Publications
Fathi Abdelfattah Farag Ahmed, "Fathi . A. Farag, M. C. Schneider and C. Galup-Montoro, “ Inverter-Based Switched Current Circuit for Very Low-Voltage and Low-Power Applications” (ISCAS), Japan, pp.1413-1416, May 2005", International Symposium on Circuits and Systems (ISCAS), Kobe, Japan, pp.1413-1416, May 2005., 2005
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Fathi Abdelfattah Farag Ahmed, "Speeded up robust features for efficient iris recognition", Springer, 2016
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