FPGA recognition of digital modulation with adaptive receiver

This thesis introduces an algorithm for digital modulation recognition. The recognition algorithm is used to build an adaptive receiver. The algorithm is implemented using Field Programmable Gate Array (FPGA). FPGA is an attractive choice for the implementation due to its advantages in performance, power consumption and configurability. Most of automatic modulation recognition (AMR) researches are based on complex techniques that are not suitable for real time implementation. A new algorithm for AMR is introduced to detect the type of digital modulation presented in the incoming signal. This algorithm is carefully designed to meet the requirements of FPGA to obtain a single module that can be fitted in one chip. The modulation recognizer is then used to build an adaptive receiver that can automatically activate one of the demodulators according to the modulation scheme detected. The modulation types considered are amplitude shift keying ASK, frequency shift keying FSK, and phase shift keying PSK. The modulation degree up to 16-ary is used for different modulation techniques. The implementation is carried out using the SPARTAN-3 development kit from Xilinx for the AMR part and XS40 development kit for the demodulator part. The proposed system was tested under noisy environment with SNR of 10 dB and the success rate is 100% (without errors). This result represents a performance advantage over previous researches in AMR.